Huawei reportedly says it has developed domestic chip design tools despite U.S. sanctions

Huawei reportedly said it has developed its own chip design tools, a move aimed at side-stepping U.S. sanctions and making the Chinese technology giant more self-sufficient in the semiconductor space.

Eric Xu, rotating chairman at Huawei, said the company along with other domestic firms, jointly created electronic chip design tools required to make semiconductors at 14 nanometers and above, according to a speech obtained by Chinese financial and business publication Yicai.

Xu said those tools will be verified this year, which would allow them to be put into use.

Huawei was not immediately available for comment when contacted by CNBC.

If Xu’s claims are true, Huawei would have taken a step to reducing its reliance on U.S. technology in semiconductors. U.S. firms dominate the chip design tool market with companies like Synopsys and Cadence Design Systems.

But in 2020, Washington, through sanctions, cut off Huawei from American chipmaking tools, which crippled the Chinese technology giant’s smartphone business.

Xu’s speech said that the design tools would be for 14 nanometer chips and above. The nanometer figure refers to the size of each individual transistor on a chip. The smaller the transistor, the more of them can be packed onto a single semiconductor. Typically, a reduction in nanometer size can yield more powerful and efficient chips.

However 14 nanometer chips are several generations behind what is currently being put into the latest smartphone technology. For example, Apple’s iPhone 14 Pro Max uses a 5 nanometer chip. However, 14 nanometer chips may be used in some of the company’s other products.

Pranay Kotasthane, chairperson of the high tech geopolitics program at the Takshashila Institution, told CNBC he would wait to see more details before knowing how effective Huawei’s design tools are.

Kotasthane explained that contract chip manufacturing firms, also known as foundries, work with semiconductor design companies to come up with a set of files called a Process Design Kit. This PDK “models the physical and electrical characteristics” of the basic components of a chip. The design firm and manufacturer needs to go through a process to optimize the production to ensure the highest yield of semiconductors. If this process does not happen, then “chip designs will fail when converted into silicon,” Kotasthane said.

“There’s not enough proof yet to suggest that Chinese EDA [electronic design automation] companies have crossed this barrier,” Kotasthane said.